mirror of
https://github.com/rn10950/RetroZilla.git
synced 2024-11-15 04:00:12 +01:00
505 lines
10 KiB
ArmAsm
505 lines
10 KiB
ArmAsm
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/* ***** BEGIN LICENSE BLOCK *****
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* Version: MPL 1.1/GPL 2.0/LGPL 2.1
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*
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* The contents of this file are subject to the Mozilla Public License Version
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* 1.1 (the "License"); you may not use this file except in compliance with
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* the License. You may obtain a copy of the License at
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* http://www.mozilla.org/MPL/
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*
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* Software distributed under the License is distributed on an "AS IS" basis,
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* WITHOUT WARRANTY OF ANY KIND, either express or implied. See the License
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* for the specific language governing rights and limitations under the
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* License.
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*
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* The Original Code is the Netscape security libraries.
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*
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* The Initial Developer of the Original Code is
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* Netscape Communications Corporation.
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* Portions created by the Initial Developer are Copyright (C) 2000
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* the Initial Developer. All Rights Reserved.
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*
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* Contributor(s):
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*
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* Alternatively, the contents of this file may be used under the terms of
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* either the GNU General Public License Version 2 or later (the "GPL"), or
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* the GNU Lesser General Public License Version 2.1 or later (the "LGPL"),
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* in which case the provisions of the GPL or the LGPL are applicable instead
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* of those above. If you wish to allow use of your version of this file only
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* under the terms of either the GPL or the LGPL, and not to allow others to
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* use your version of this file under the terms of the MPL, indicate your
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* decision by deleting the provisions above and replace them with the notice
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* and other provisions required by the GPL or the LGPL. If you do not delete
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* the provisions above, a recipient may use your version of this file under
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* the terms of any one of the MPL, the GPL or the LGPL.
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*
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* ***** END LICENSE BLOCK ***** */
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#include <regdef.h>
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.set noreorder
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.set noat
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.section .text, 1, 0x00000006, 4, 4
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.text:
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.section .text
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.ent s_mpv_mul_d_add
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.globl s_mpv_mul_d_add
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s_mpv_mul_d_add:
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#/* c += a * b */
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#void s_mpv_mul_d_add(const mp_digit *a, mp_size a_len, mp_digit b,
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# mp_digit *c)
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#{
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# mp_digit a0, a1; regs a4, a5
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# mp_digit c0, c1; regs a6, a7
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# mp_digit cy = 0; reg t2
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# mp_word w0, w1; regs t0, t1
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#
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# if (a_len) {
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beq a1,zero,.L.1
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move t2,zero # cy = 0
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dsll32 a2,a2,0 # "b" is sometimes negative (?!?!)
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dsrl32 a2,a2,0 # This clears the upper 32 bits.
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# a0 = a[0];
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lwu a4,0(a0)
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# w0 = ((mp_word)b * a0);
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dmultu a2,a4
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# if (--a_len) {
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addiu a1,a1,-1
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beq a1,zero,.L.2
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# while (a_len >= 2) {
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sltiu t3,a1,2
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bne t3,zero,.L.3
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# a1 = a[1];
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lwu a5,4(a0)
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.L.4:
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# a_len -= 2;
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addiu a1,a1,-2
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# c0 = c[0];
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lwu a6,0(a3)
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# w0 += cy;
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mflo t0
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daddu t0,t0,t2
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# w0 += c0;
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daddu t0,t0,a6
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# w1 = (mp_word)b * a1;
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dmultu a2,a5 #
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# a0 = a[2];
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lwu a4,8(a0)
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# a += 2;
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addiu a0,a0,8
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# c1 = c[1];
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lwu a7,4(a3)
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# w1 += cy;
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mflo t1
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daddu t1,t1,t2
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# w1 += c1;
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daddu t1,t1,a7
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# w0 = (mp_word)b * a0;
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dmultu a2,a4 #
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# cy = CARRYOUT(w1);
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dsrl32 t2,t1,0
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# c[1] = ACCUM(w1);
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sw t1,4(a3)
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# c += 2;
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addiu a3,a3,8
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sltiu t3,a1,2
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beq t3,zero,.L.4
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# a1 = a[1];
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lwu a5,4(a0)
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# }
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.L.3:
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# c0 = c[0];
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lwu a6,0(a3)
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# w0 += cy;
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# if (a_len) {
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mflo t0
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beq a1,zero,.L.5
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daddu t0,t0,t2
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# w1 = (mp_word)b * a1;
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dmultu a2,a5
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# w0 += c0;
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daddu t0,t0,a6 #
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# c1 = c[1];
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lwu a7,4(a3)
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# w1 += cy;
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mflo t1
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daddu t1,t1,t2
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# w1 += c1;
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daddu t1,t1,a7
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# c[1] = ACCUM(w1);
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sw t1,4(a3)
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# cy = CARRYOUT(w1);
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dsrl32 t2,t1,0
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# c += 1;
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b .L.6
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addiu a3,a3,4
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# } else {
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.L.5:
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# w0 += c0;
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daddu t0,t0,a6
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# cy = CARRYOUT(w0);
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b .L.6
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dsrl32 t2,t0,0
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# }
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# } else {
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.L.2:
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# c0 = c[0];
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lwu a6,0(a3)
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# w0 += c0;
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mflo t0
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daddu t0,t0,a6
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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# }
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.L.6:
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# c[1] = cy;
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jr ra
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sw t2,4(a3)
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# }
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.L.1:
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jr ra
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nop
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#}
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#
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.end s_mpv_mul_d_add
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.ent s_mpv_mul_d_add_prop
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.globl s_mpv_mul_d_add_prop
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s_mpv_mul_d_add_prop:
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#/* c += a * b */
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#void s_mpv_mul_d_add_prop(const mp_digit *a, mp_size a_len, mp_digit b,
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# mp_digit *c)
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#{
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# mp_digit a0, a1; regs a4, a5
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# mp_digit c0, c1; regs a6, a7
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# mp_digit cy = 0; reg t2
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# mp_word w0, w1; regs t0, t1
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#
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# if (a_len) {
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beq a1,zero,.M.1
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move t2,zero # cy = 0
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dsll32 a2,a2,0 # "b" is sometimes negative (?!?!)
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dsrl32 a2,a2,0 # This clears the upper 32 bits.
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# a0 = a[0];
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lwu a4,0(a0)
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# w0 = ((mp_word)b * a0);
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dmultu a2,a4
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# if (--a_len) {
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addiu a1,a1,-1
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beq a1,zero,.M.2
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# while (a_len >= 2) {
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sltiu t3,a1,2
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bne t3,zero,.M.3
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# a1 = a[1];
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lwu a5,4(a0)
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.M.4:
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# a_len -= 2;
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addiu a1,a1,-2
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# c0 = c[0];
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lwu a6,0(a3)
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# w0 += cy;
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mflo t0
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daddu t0,t0,t2
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# w0 += c0;
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daddu t0,t0,a6
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# w1 = (mp_word)b * a1;
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dmultu a2,a5 #
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# a0 = a[2];
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lwu a4,8(a0)
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# a += 2;
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addiu a0,a0,8
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# c1 = c[1];
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lwu a7,4(a3)
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# w1 += cy;
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mflo t1
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daddu t1,t1,t2
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# w1 += c1;
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daddu t1,t1,a7
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# w0 = (mp_word)b * a0;
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dmultu a2,a4 #
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# cy = CARRYOUT(w1);
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dsrl32 t2,t1,0
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# c[1] = ACCUM(w1);
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sw t1,4(a3)
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# c += 2;
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addiu a3,a3,8
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sltiu t3,a1,2
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beq t3,zero,.M.4
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# a1 = a[1];
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lwu a5,4(a0)
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# }
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.M.3:
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# c0 = c[0];
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lwu a6,0(a3)
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# w0 += cy;
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# if (a_len) {
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mflo t0
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beq a1,zero,.M.5
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daddu t0,t0,t2
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# w1 = (mp_word)b * a1;
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dmultu a2,a5
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# w0 += c0;
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daddu t0,t0,a6 #
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# c1 = c[1];
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lwu a7,4(a3)
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# w1 += cy;
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mflo t1
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daddu t1,t1,t2
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# w1 += c1;
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daddu t1,t1,a7
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# c[1] = ACCUM(w1);
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sw t1,4(a3)
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# cy = CARRYOUT(w1);
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dsrl32 t2,t1,0
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# c += 1;
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b .M.6
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addiu a3,a3,8
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# } else {
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.M.5:
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# w0 += c0;
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daddu t0,t0,a6
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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b .M.6
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addiu a3,a3,4
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# }
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# } else {
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.M.2:
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# c0 = c[0];
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lwu a6,0(a3)
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# w0 += c0;
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mflo t0
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daddu t0,t0,a6
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# c[0] = ACCUM(w0);
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sw t0,0(a3)
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# cy = CARRYOUT(w0);
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dsrl32 t2,t0,0
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addiu a3,a3,4
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# }
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.M.6:
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# while (cy) {
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beq t2,zero,.M.1
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nop
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.M.7:
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# mp_word w = (mp_word)*c + cy;
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lwu a6,0(a3)
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daddu t2,t2,a6
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# *c++ = ACCUM(w);
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sw t2,0(a3)
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# cy = CARRYOUT(w);
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dsrl32 t2,t2,0
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bne t2,zero,.M.7
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addiu a3,a3,4
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|
|
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# }
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.M.1:
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jr ra
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nop
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#}
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#
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.end s_mpv_mul_d_add_prop
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||
|
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.ent s_mpv_mul_d
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||
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|
.globl s_mpv_mul_d
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||
|
|
|
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s_mpv_mul_d:
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#/* c = a * b */
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||
|
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#void s_mpv_mul_d(const mp_digit *a, mp_size a_len, mp_digit b,
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|
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# mp_digit *c)
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||
|
|
#{
|
||
|
|
# mp_digit a0, a1; regs a4, a5
|
||
|
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# mp_digit cy = 0; reg t2
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# mp_word w0, w1; regs t0, t1
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#
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||
|
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# if (a_len) {
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beq a1,zero,.N.1
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move t2,zero # cy = 0
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||
|
|
dsll32 a2,a2,0 # "b" is sometimes negative (?!?!)
|
||
|
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dsrl32 a2,a2,0 # This clears the upper 32 bits.
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||
|
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# a0 = a[0];
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|
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lwu a4,0(a0)
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# w0 = ((mp_word)b * a0);
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dmultu a2,a4
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# if (--a_len) {
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||
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addiu a1,a1,-1
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beq a1,zero,.N.2
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# while (a_len >= 2) {
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|
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sltiu t3,a1,2
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||
|
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bne t3,zero,.N.3
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||
|
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# a1 = a[1];
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||
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|
lwu a5,4(a0)
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||
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|
.N.4:
|
||
|
|
# a_len -= 2;
|
||
|
|
addiu a1,a1,-2
|
||
|
|
# w0 += cy;
|
||
|
|
mflo t0
|
||
|
|
daddu t0,t0,t2
|
||
|
|
# cy = CARRYOUT(w0);
|
||
|
|
dsrl32 t2,t0,0
|
||
|
|
# w1 = (mp_word)b * a1;
|
||
|
|
dmultu a2,a5
|
||
|
|
# c[0] = ACCUM(w0);
|
||
|
|
sw t0,0(a3)
|
||
|
|
# a0 = a[2];
|
||
|
|
lwu a4,8(a0)
|
||
|
|
# a += 2;
|
||
|
|
addiu a0,a0,8
|
||
|
|
# w1 += cy;
|
||
|
|
mflo t1
|
||
|
|
daddu t1,t1,t2
|
||
|
|
# cy = CARRYOUT(w1);
|
||
|
|
dsrl32 t2,t1,0
|
||
|
|
# w0 = (mp_word)b * a0;
|
||
|
|
dmultu a2,a4
|
||
|
|
# c[1] = ACCUM(w1);
|
||
|
|
sw t1,4(a3)
|
||
|
|
# c += 2;
|
||
|
|
addiu a3,a3,8
|
||
|
|
sltiu t3,a1,2
|
||
|
|
beq t3,zero,.N.4
|
||
|
|
# a1 = a[1];
|
||
|
|
lwu a5,4(a0)
|
||
|
|
# }
|
||
|
|
.N.3:
|
||
|
|
# w0 += cy;
|
||
|
|
# if (a_len) {
|
||
|
|
mflo t0
|
||
|
|
beq a1,zero,.N.5
|
||
|
|
daddu t0,t0,t2
|
||
|
|
# w1 = (mp_word)b * a1;
|
||
|
|
dmultu a2,a5 #
|
||
|
|
# cy = CARRYOUT(w0);
|
||
|
|
dsrl32 t2,t0,0
|
||
|
|
# c[0] = ACCUM(w0);
|
||
|
|
sw t0,0(a3)
|
||
|
|
# w1 += cy;
|
||
|
|
mflo t1
|
||
|
|
daddu t1,t1,t2
|
||
|
|
# c[1] = ACCUM(w1);
|
||
|
|
sw t1,4(a3)
|
||
|
|
# cy = CARRYOUT(w1);
|
||
|
|
dsrl32 t2,t1,0
|
||
|
|
# c += 1;
|
||
|
|
b .N.6
|
||
|
|
addiu a3,a3,4
|
||
|
|
# } else {
|
||
|
|
.N.5:
|
||
|
|
# c[0] = ACCUM(w0);
|
||
|
|
sw t0,0(a3)
|
||
|
|
# cy = CARRYOUT(w0);
|
||
|
|
b .N.6
|
||
|
|
dsrl32 t2,t0,0
|
||
|
|
# }
|
||
|
|
# } else {
|
||
|
|
.N.2:
|
||
|
|
mflo t0
|
||
|
|
# c[0] = ACCUM(w0);
|
||
|
|
sw t0,0(a3)
|
||
|
|
# cy = CARRYOUT(w0);
|
||
|
|
dsrl32 t2,t0,0
|
||
|
|
# }
|
||
|
|
.N.6:
|
||
|
|
# c[1] = cy;
|
||
|
|
jr ra
|
||
|
|
sw t2,4(a3)
|
||
|
|
# }
|
||
|
|
.N.1:
|
||
|
|
jr ra
|
||
|
|
nop
|
||
|
|
#}
|
||
|
|
#
|
||
|
|
.end s_mpv_mul_d
|
||
|
|
|
||
|
|
|
||
|
|
.ent s_mpv_sqr_add_prop
|
||
|
|
.globl s_mpv_sqr_add_prop
|
||
|
|
#void s_mpv_sqr_add_prop(const mp_digit *a, mp_size a_len, mp_digit *sqrs);
|
||
|
|
# registers
|
||
|
|
# a0 *a
|
||
|
|
# a1 a_len
|
||
|
|
# a2 *sqr
|
||
|
|
# a3 digit from *a, a_i
|
||
|
|
# a4 square of digit from a
|
||
|
|
# a5,a6 next 2 digits in sqr
|
||
|
|
# a7,t0 carry
|
||
|
|
s_mpv_sqr_add_prop:
|
||
|
|
move a7,zero
|
||
|
|
move t0,zero
|
||
|
|
lwu a3,0(a0)
|
||
|
|
addiu a1,a1,-1 # --a_len
|
||
|
|
dmultu a3,a3
|
||
|
|
beq a1,zero,.P.3 # jump if we've already done the only sqr
|
||
|
|
addiu a0,a0,4 # ++a
|
||
|
|
.P.2:
|
||
|
|
lwu a5,0(a2)
|
||
|
|
lwu a6,4(a2)
|
||
|
|
addiu a2,a2,8 # sqrs += 2;
|
||
|
|
dsll32 a6,a6,0
|
||
|
|
daddu a5,a5,a6
|
||
|
|
lwu a3,0(a0)
|
||
|
|
addiu a0,a0,4 # ++a
|
||
|
|
mflo a4
|
||
|
|
daddu a6,a5,a4
|
||
|
|
sltu a7,a6,a5 # a7 = a6 < a5 detect overflow
|
||
|
|
dmultu a3,a3
|
||
|
|
daddu a4,a6,t0
|
||
|
|
sltu t0,a4,a6
|
||
|
|
add t0,t0,a7
|
||
|
|
sw a4,-8(a2)
|
||
|
|
addiu a1,a1,-1 # --a_len
|
||
|
|
dsrl32 a4,a4,0
|
||
|
|
bne a1,zero,.P.2 # loop if a_len > 0
|
||
|
|
sw a4,-4(a2)
|
||
|
|
.P.3:
|
||
|
|
lwu a5,0(a2)
|
||
|
|
lwu a6,4(a2)
|
||
|
|
addiu a2,a2,8 # sqrs += 2;
|
||
|
|
dsll32 a6,a6,0
|
||
|
|
daddu a5,a5,a6
|
||
|
|
mflo a4
|
||
|
|
daddu a6,a5,a4
|
||
|
|
sltu a7,a6,a5 # a7 = a6 < a5 detect overflow
|
||
|
|
daddu a4,a6,t0
|
||
|
|
sltu t0,a4,a6
|
||
|
|
add t0,t0,a7
|
||
|
|
sw a4,-8(a2)
|
||
|
|
beq t0,zero,.P.9 # jump if no carry
|
||
|
|
dsrl32 a4,a4,0
|
||
|
|
.P.8:
|
||
|
|
sw a4,-4(a2)
|
||
|
|
/* propagate final carry */
|
||
|
|
lwu a5,0(a2)
|
||
|
|
daddu a6,a5,t0
|
||
|
|
sltu t0,a6,a5
|
||
|
|
bne t0,zero,.P.8 # loop if carry persists
|
||
|
|
addiu a2,a2,4 # sqrs++
|
||
|
|
.P.9:
|
||
|
|
jr ra
|
||
|
|
sw a4,-4(a2)
|
||
|
|
|
||
|
|
.end s_mpv_sqr_add_prop
|